Case Study

The Customer
The customer is a Silicon Valley based subsidiary of a large US holding company with a telecommunication infrastructure focus. The customer has patented DSP algorithms that offer a fundamentally different and more efficient method for digital representation of signals, allowing extremely robust reconstruction of signals in the presence of noise and timing errors.

The Product
The customer required a reference design to implement and demonstrate the advantages of their algorithm to improve the performance of multichannel modulation schemes in the presence of colored noise.

The Solution
The customer's algorithm was provided to Ittiam Systems as 40 lines of Mathematica code.

A simulatable floating point C model for the algorithm was developed from the reference Mathematica code. The C model allowed for faster simulations of the modulation scheme with or without the customer's extension, performance analysis, algorithmic exploration and refinement.

In addition, the C model also included effects such as a channel, equalization and timing jitter.

In parallel with the development of the C model, Ittiam Systems selected a fixed point Digital Signal processor best suited for implementation of the reference design. A four layer transceiver board was designed, including the selected processor, A/D, D/A convertors and a PLL for clock recovery.

On finalization of the algorithm (based on C model simulations), the floating point C code was implemented as optimized fixed point assembly on the Digital Signal Processor.

The final technology demonstrator includes two transceivers communicating in real time over a CAT5 inteface, with a User Interface on a PC to control the demonstration.

The product has allowed the customer to successfully demonstrate the feasibility and benefits of their algorithm.

Mathematica Code

C Model of Algorithm developed by
Ittiam Systems

Tranceiver Board designed by Ittiam Systems